Purpose

Coordinate intentional time delays while retaining required disconnection and equipment-withstand performance.

Learning objectives

• Explain grading margin
• Coordinate adjustable delays
• Check maximum disconnection time
• Account for fault energy

Time discrimination delays the upstream device long enough for a downstream device to clear. The delay must include device tolerances and breaker clearing time while remaining safe for conductors, equipment, and shock protection.

Core theory

A grading margin is not merely the difference between dial settings; it includes downstream clearing time, upstream tolerance, relay error, breaker travel, overshoot, and the manufacturer's coordination method.

Definite-time and inverse-time functions can be graded, but instantaneous or high-set elements may still overlap and defeat selectivity at high fault current.

Every delay is checked against automatic-disconnection requirements, adiabatic/thermal withstand, arc-energy exposure, source stability, and the maximum fault-clearing duty of the assembly.

Assumptions: Times use compatible manufacturer definitions; Other tolerances are already included in the 0.12 s margin.

1. Downstream: Use the maximum clearing time: 0.18 s.
2. Margin: Add 0.12 s rather than subtracting it.
3. Candidate: 0.18 s + 0.12 s = 0.30 s, then check all safety limits.

The earliest candidate upstream clearing time is 0.30 s; it is not approved until the remaining checks pass.

Reasonableness check: The upstream device must remain closed through downstream clearing plus the grading allowance.

Knowledge check

Answer: No. It may breach disconnection, withstand, or arc-energy constraints.

Practical exercise

Create a paper time-grading sequence and list every constraint that could reject it.

Summary

• Margins include tolerances and clearing
• High-set elements also need coordination
• Delay must remain within safety limits